The present invention relates to a semiconductor memory device and, more particularly, to a dynamic or programmable random access memory.
Various types of programmable semiconductor memory devices have become commercially available in recent years. Among these devices, a dynamic random access memory (dRAM) having memory cells each consisting of one MOSFET and one MOS capacitor, has been a major memory product due to its high packing density.
In a conventional dRAM, memory cells are formed at cross points between a plurality of bit line pairs and word lines. The intersections between the bit and word lines have dummy cells which receive a dummy cell write clock signal through a dummy cell clock line. Sense amplifiers are arranged at the bit line pairs and are used on the order of 1,000 units in a conventional dRAM. The sense amplifiers are connected by a common line to first and second MOSFETs which are connected in parallel with each other and have different transconductances. The first MOSFET receives a pre-sensing clock signal, and the second MOSFET receives a main sensing clock signal. In the pre-sensing mode, the first MOSFET is rendered conductive. In the main sensing mode, the second MOSFET is rendered conductive. The sense amplifiers are activated in a two-step manner in the pre-sensing and main sensing modes upon selective switching of the first and second MOSFETs. More specifically, when the first MOSFET is rendered conductive, all the sense amplifiers are simultaneously activated and perform pre-sensing. Similarly, when the second MOSFET is rendered conductive, all the sense amplifiers are simultaneously activated to perform main sensing. This sense amplifier drive scheme is well known as a "multi-grounded method" to those skilled in the art.
In a data read/write mode, the sense amplifiers arranged at the bit line pairs are driven by the multi-grounded method and perform pre-sensing and main sensing operations. In this case, all the sense amplifiers are simultaneously activated in each sensing mode. Therefore, the bit lines connected to all the sense amplifiers are simultaneously discharged. When discharge occurs for a short period of time, a peak current increases and causes variations in ground voltage Vss. Variations in ground voltage Vss cause internal noise in the memory, thereby degrading reliability of the data read/write operation.